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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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ST10F280 데이터시트(PDF) 55 Page - STMicroelectronics |
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ST10F280 데이터시트(HTML) 55 Page - STMicroelectronics |
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55 / 239 page  ST10F280 Central Processing Unit (CPU) Doc ID 8673 Rev. 3 55/239 Figure 10. MAC unit architecture 6.2 Instruction set summary The Table 4 lists the instructions of the ST10F280. The various addressing modes, instruction operation, parameters for conditional execution of instructions, opcodes and a detailed description of each instruction can be found in the “ST10 Family Programming Manual”. Table 4. Instruction set summary Mnemonic Description Bytes ADD(B) Add word (byte) operands 2 / 4 ADDC(B) Add word (byte) operands with Carry 2 / 4 SUB(B) Subtract word (byte) operands 2 / 4 SUBC(B) Subtract word (byte) operands with Carry 2 / 4 MUL(U) (Un)Signed multiply direct GPR by direct GPR (16-16-bit) 2 DIV(U) (Un)Signed divide register MDL by direct GPR (16-/16-bit) 2 DIVL(U) (Un)Signed long divide reg. MD by direct GPR (32-/16-bit) 2 CPL(B) Complement direct word (byte) GPR 2 NEG(B) Negate direct word (byte) GPR 2 |
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