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ST10F280 데이터시트(PDF) 145 Page - STMicroelectronics |
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ST10F280 데이터시트(HTML) 145 Page - STMicroelectronics |
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145 / 239 page ![]() ST10F280 A/D converter Doc ID 8673 Rev. 3 145/239 Registers mapping 13.3.3 Block diagram Figure 53. XTIMER block diagram Clocks The XTCVR register clock is the prescaler output. The prescaler allows to divide the basic register frequency in order to offer a wide range of counting period, from 2**2 to 2**33 cycles (note that 1 cycle = 1 XCLK periods). Table 27. Timer registers mapping Address (Hexa) Register Name Reset Value (Hexa) Access C000h XTCR : Control 0000h RW C002h XTSVR : Start Value 0000h RW C004h XTEVR : End Value 0000h RW C006h XTCVR : Current Value 0000h R |
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