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PXD10 데이터시트(PDF) 53 Page - Freescale Semiconductor, Inc |
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PXD10 데이터시트(HTML) 53 Page - Freescale Semiconductor, Inc |
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53 / 130 page ![]() Pinout and signal descriptions PXD10 Microcontroller Data Sheet, Rev. 1 Freescale Semiconductor 53 SIN_0, SIN_1 DSPI SPI data input signal SOUT_0, SOUT_1 DSPI SPI data output signal PCS0_2 QuadSPI Peripheral chip select for serial flash mode or chip select 0 for SPI master mode IO2/PCS1_2 QuadSPI Chip select 1 for SPI master mode and bidirectional IO2 for serial flash mode IO3/PCS2_2 QuadSPI Chip select 2 for SPI master mode and bidirectional IO3 for serial flash mode IO0/SIN_2 QuadSPI Data input signal for SPI master and slave modes and bidirectional IO0 for serial flash mode IO1/SOUT_2 QuadSPI Data output signal for SPI master and slave modes and bidirectional IO1 for serial flash mode SCK_2 QuadSPI Clock output signal for SPI master and serial flash modes and clock input signal for SPI slave mode eMIOSA[8:23], eMIOSB[16:23] eMIOS Enhanced Modular Input Output System. 16+8 channel eMIOS for timed input or output functions. CANRX_0, CANRX_1 FlexCAN Receive (RX) pins for the CAN bus transceiver CANTX_0, CANTX_1 FlexCAN Transmit (TX) pins for the CAN bus transceiver SCL_0, SCL_1, SCL_2, SCL_3 I2C Bidirectional serial clock compatible with I2C specifications SDA_0, SDA_1, SDA_2, SDA_3 I2C Bidirectional serial data compatible with I2C specifications TCK JTAG Debug port serial clock as per JTAG specifications TDI JTAG Debug port serial data input port as per JTAG standards specifications TDO JTAG Debug port serial data output port as per JTAG standards specifications TMS JTAG Debug port Test Mode Select signal for the JTAG TAP controller state machine and indicates various state transitions for the TAP controller in the device BP[0:3] LCD Backplane signals from the LCD controlling the backplane reference voltage for the LCD display FP[0:39] LCD Frontplane signals for LCD segments EVTI Nexus Nexus2+ event input trigger EVTO Nexus Nexus2+ event output trigger Table 8. Signal details (continued) Signal Peripheral Description |
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