SAM3X datasheet(8/71 Pages) ATMEL

8 / 71 page

11057BS–ATARM–13-Jul-12

SAM3X/A

11057BS–ATARM–13-Jul-12

SAM3X/A

ICE and JTAG

TCK/SWCLK

Test Clock/Serial Wire Clock

Input

VDDIO

Reset State:

- SWJ-DP Mode

- Internal pull-up

disabled

(1)

TDI

Test Data In

Input

TDO/TRACESWO

Test Data Out / Trace Asynchronous Data

Out

Output

TMS/SWDIO

Test Mode Select /Serial Wire

Input/Output

Input / I/O

JTAGSEL

JTAG Selection

Input

High

VDDBU

Permanent Internal

pull-down

Flash Memory

ERASE

Flash and NVM Configuration Bits

Erase Command

Input

High

VDDIO

Pull-down resistor

Reset/Test

NRST

Microcontroller Reset

I/O

Low

VDDIO

Pull-up resistor

NRSTB

Asynchronous Microcontroller Reset

Input

Low

VDDBU

Pull-up resistor

TST

Test Mode Select

Input

VDDBU

Pull-down resistor

Universal Asynchronous Receiver Transceiver - UART

URXD

UART Receive Data

Input

UTXD

UART Transmit Data

Output

Table 3-1.

Signal Description List (Continued)

Signal Name

Function

Type

Active

Level

Voltage

Reference

Comments

SAM3X 데이터시트(PDF) 8 Page - ATMEL Corporation

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