AD6432

–12–

REV. 0

Receive Mixer

The UHF mixer is an improved Gilbert-cell design that can

operate from low frequencies (it is internally dc-coupled) up to

an RF input of 350 MHz. The dynamic range at the input of the

mixer is determined, at the upper end, by the maximum input

signal level of

±71 mV (–13 dBm in 50 Ω between RFHI and

RFLO) up to which the mixer remains linear and, at the lower

end, by the noise level. It is customary to define the linearity of

a mixer in terms of the 1 dB gain-compression point and third-

order intercept, which for the AD6432 are –13 dBm and 0 dBm,

respectively, in a 50

Ω system.

The mixer’s RF input port is differential, that is, pin RFLO is

functionally identical to RFHI, and these nodes are internally

biased. The RF port can be modeled as a parallel RC circuit as

shown in Figure 29. The local oscillator input of the receive

mixer is internally provided by the LO divided by two.

RFHI

RFLO

Figure 28. Mixer Port Modeled as a Parallel RC Network

The output of the mixer is differential. The nominal conversion

gain is specified for operation into a 26 MHz LC IF bandpass

filter, as shown in Figure 29 and Table I.

MXOP

C1

C2

C1

L1

MXOM

IFIM

IFIP

Figure 29. Suggested IF Filter Inserted Between the

Mixer’s Output Port and the Amplifier’s Input Port

The conversion gain is measured between the mixer input and

the input of this filter, and varies between –3 dB and +15 dB.

Table I. Filter Component Values for Selected Frequencies

Frequency

C1

L1

C2

13 MHz

27 pF

0.82

µH

180 pF

26 MHz

22 pF

0.39

µH

82 pF

The maximum permissible signal level between MXOP and

MXOM is determined by the maximum gain control voltage.

The mixer output port, having pull-up resistors of 250

Ω to

VPRX, is shown in Figure 30.

VPRX

MXOP

250

Ω

250

Ω

MXOM

Figure 30. Mixer Output Port

IF Amplifier

Most of the gain in the AD6432 receive section is provided by

the IF amplifier strip, which comprises two stages. Both are fully

differential and each has a gain span of 31 dB for the AGC volt-

age range of 0.2 V to 2.4 V. Thus, in conjunction with the vari-

able gain of the mixer, the total gain span is 80 dB. The overall IF

gain varies from –14 dB to +48 dB for the nominal AGC voltage of

The IF input is differential, at IFHI and IFLO. Figure 32 shows

a simplified schematic of the IF interface modeled as parallel

RC network.

The operative range of the IF amplifier is approximately 50 MHz

from IFHI and IFLO through the demodulator.

IFHI

IFLO

Figure 31. IF Amplifier Port Modeled as a Parallel RC

Gain Scaling

The overall gain of the AD6432, expressed in decibels, is linear

power supply voltage. The gain of all stages changes simulta-

neously. The AD6432’s gain scaling is also temperature-

compensated. Note that GAIN pin of the AD6432 is an input

driven by an external low impedance voltage source, normally a

DAC, under the control of radio’s digital processor.

The gain-control scaling is directly proportional to the reference

voltage applied to the Pin GREF and is independent of the

power supply voltage. When this input is set to the nominal

value of 1.2 V, the scale is nominally 27.5 mV/dB (36.4 dB/V).

Under these conditions, 80 dB of gain range (mixer plus IF)

final centering of this 2.2 V range depends on the insertion losses of

the IF filters used.

provided, for example, by a AD1580 (1.21 V) voltage reference.

When using the Analog Devices AD7013 (IS54, TETRA and

satellite receiver applications) and AD7015 or AD6421 (GSM,

DCS1800, PCS1900) baseband converters, the external refer-

ence may also be provided by the reference output of the