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STM32F407IE 데이터시트(PDF) 137 Page - STMicroelectronics |
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STM32F407IE 데이터시트(HTML) 137 Page - STMicroelectronics |
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137 / 180 page ![]() STM32F405xx, STM32F407xx Electrical characteristics Doc ID 022152 Rev 3 137/180 Synchronous waveforms and timings Figure 57 through Figure 60 represent synchronous waveforms and Table 78 through Table 80 provide the corresponding timings. The results shown in these tables are obtained with the following FSMC configuration: ● BurstAccessMode = FSMC_BurstAccessMode_Enable; ● MemoryType = FSMC_MemoryType_CRAM; ● WriteBurst = FSMC_WriteBurst_Enable; ● CLKDivision = 1; (0 is not supported, see the STM32F40xxx/41xxx reference manual) ● DataLatency = 1 for NOR Flash; DataLatency = 0 for PSRAM In all timing tables, the THCLK is the HCLK clock period (with maximum FSMC_CLK = 60 MHz). Figure 57. Synchronous multiplexed NOR/PSRAM read timings |
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