LCMXO2-640ZE-1TG100C datasheet(28/106 Pages) LATTICE

28 / 106 page

2-24

Architecture

MachXO2 Family Data Sheet

Table 2-12. Supported Input Standards

Types of Output Buffers

Single-ended buffers with

complementary outputs (all I/O

banks)

Single-ended buffers with

complementary outputs (all I/O

banks)

Differential buffers with true

LVDS outputs (50% on top

side)

Single-ended buffers with

complementary outputs (all I/O

banks)

Differential buffers with true

LVDS outputs (50% on top

side)

Differential Output Emulation

Capability

All I/O banks

PCI Clamp Support

Clamp on bottom side only

VCCIO (Typ.)

Input Standard

3.3V

2.5V

1.8V

1.5

1.2V

Single-Ended Interfaces

LVTTL

2

2

LVCMOS33

2

2

LVCMOS25

2

2

2

LVCMOS18

2

2

LVCMOS15

2

2

LVCMOS12

2



PCI



SSTL18 (Class I, Class II)



SSTL25 (Class I, Class II)



HSTL18 (Class I, Class II)



Differential Interfaces

LVDS



BLVDS, MVDS, LVPECL, RSDS



Differential SSTL18 Class I, II



Differential SSTL25 Class I, II



Differential HSTL18 Class I, II



1. Bottom banks of MachXO2-640U, MachXO2-1200/U and higher density devices only.

2. Reduced functionality. Refer to TN1202, MachXO2 sysIO Usage Guide for more detail.

MachXO2-256,

MachXO2-640

MachXO2-640U,

MachXO2-1200

MachXO2-1200U

MachXO2-2000/U,

MachXO2-4000,

MachXO2-7000

LCMXO2-640ZE-1TG100C 데이터시트(PDF) 28 Page - Lattice Semiconductor

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