PIC16F883-ESLASHSO. datasheet(66/338 Pages) MICROCHIP

66 / 338 page

PIC16F882/883/884/886/887

DS41291G-page 66

 2006-2012 Microchip Technology Inc.

4.2

Oscillator Control

The Oscillator Control (OSCCON) register (Figure 4-1)

controls the system clock and frequency selection

options. The OSCCON register contains the following

bits:

• Frequency selection bits (IRCF)

• Frequency Status bits (HTS, LTS)

• System clock control bits (OSTS, SCS)

OSCCON: OSCILLATOR CONTROL REGISTER

U-0

R/W-1

R/W-0

R-1

R-0

R/W-0

—

IRCF2

IRCF1

IRCF0

OSTS(1)

HTS

LTS

SCS

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

Unimplemented: Read as ‘0’

bit 6-4

IRCF<2:0>: Internal Oscillator Frequency Select bits

111 = 8 MHz

110 = 4 MHz (default)

101 = 2 MHz

100 = 1 MHz

011 = 500 kHz

010 = 250 kHz

001 = 125 kHz

000 = 31 kHz (LFINTOSC)

bit 3

OSTS: Oscillator Start-up Time-out Status bit(1)

1 = Device is running from the clock defined by FOSC<2:0> of the CONFIG1 register

0 = Device is running from the internal oscillator (HFINTOSC or LFINTOSC)

bit 2

HTS: HFINTOSC Status bit (High Frequency – 8 MHz to 125 kHz)

1 = HFINTOSC is stable

0 = HFINTOSC is not stable

bit 1

LTS: LFINTOSC Stable bit (Low Frequency – 31 kHz)

1 = LFINTOSC is stable

0 = LFINTOSC is not stable

bit 0

SCS: System Clock Select bit

1 = Internal oscillator is used for system clock

0 = Clock source defined by FOSC<2:0> of the CONFIG1 register

Note 1:

Bit resets to ‘0’ with Two-Speed Start-up and LP, XT or HS selected as the Oscillator mode or Fail-Safe

mode is enabled.

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