PIC16F883-ESLASHSO. datasheet(82/338 Pages) MICROCHIP

82 / 338 page

PIC16F882/883/884/886/887

DS41291G-page 82

 2006-2012 Microchip Technology Inc.

6.2.1

INTERNAL CLOCK SOURCE

When the internal clock source is selected the

TMR1H:TMR1L register pair will increment on multiples

of FOSC as determined by the Timer1 prescaler.

6.2.2

EXTERNAL CLOCK SOURCE

When the external clock source is selected, the Timer1

module may work as a timer or a counter.

When counting, Timer1 is incremented on the rising

edge of the external clock input T1CKI. In addition, the

Counter mode clock can be synchronized to the

microcontroller system clock or run asynchronously.

If an external clock oscillator is needed (and the

microcontroller is using the INTOSC without CLKOUT),

Timer1 can use the LP oscillator as a clock source.

In Counter mode, a falling edge must be registered by

the counter prior to the first incrementing rising edge

after one or more of the following conditions (see

Figure 6-2):

• Timer1 is enabled after POR or BOR Reset

• A write to TMR1H or TMR1L

• T1CKI is high when Timer1 is disabled and when

Timer1 is re-enabled T1CKI is low.

6.3

Timer1 Prescaler

Timer1 has four prescaler options allowing 1, 2, 4 or 8

divisions of the clock input. The T1CKPS bits of the

T1CON register control the prescale counter. The

prescale counter is not directly readable or writable;

however, the prescaler counter is cleared upon a write to

TMR1H or TMR1L.

6.4

Timer1 Oscillator

A low-power 32.768 kHz oscillator is built-in between

pins T1OSI (input) and T1OSO (amplifier output). The

oscillator is enabled by setting the T1OSCEN control

bit of the T1CON register. The oscillator will continue to

run during Sleep.

The Timer1 oscillator is identical to the LP oscillator.

The user must provide a software time delay to ensure

proper oscillator start-up.

TRISC0 and TRISC1 bits are set when the Timer1

oscillator is enabled. RC0 and RC1 bits read as ‘0’ and

TRISC0 and TRISC1 bits read as ‘1’.

6.5

Timer1 Operation in

Asynchronous Counter Mode

If control bit T1SYNC of the T1CON register is set, the

external clock input is not synchronized. The timer

continues to increment asynchronous to the internal

phase clocks. The timer will continue to run during

Sleep and can generate an interrupt on overflow,

which will wake-up the processor. However, special

precautions in software are needed to read/write the

timer (see Section 6.5.1 “Reading and Writing

Timer1 in Asynchronous Counter Mode”).

6.5.1

READING AND WRITING TIMER1 IN

ASYNCHRONOUS COUNTER

MODE

Reading TMR1H or TMR1L while the timer is running

from an external asynchronous clock will ensure a valid

read (taken care of in hardware). However, the user

should keep in mind that reading the 16-bit timer in two

8-bit values itself, poses certain problems, since the

timer may overflow between the reads.

For writes, it is recommended that the user simply stop

the timer and write the desired values. A write

contention may occur by writing to the timer registers,

while the register is incrementing. This may produce an

unpredictable value in the TMR1H:TTMR1L register

pair.

6.6

Timer1 Gate

Timer1 gate source is software configurable to be the

T1G pin or the output of Comparator C2. This allows the

device to directly time external events using T1G or

analog events using Comparator C2. See the

CM2CON1 register (Register 8-3) for selecting the

Timer1 gate source. This feature can simplify the

software for a Delta-Sigma A/D converter and many

other applications. For more information on Delta-Sigma

A/D

converters,

see

the

Microchip

web

site

(www.microchip.com).

Timer1 gate can be inverted using the T1GINV bit of

the T1CON register, whether it originates from the T1G

pin or Comparator C2 output. This configures Timer1 to

measure either the active-high or active-low time

between events.

Note:

The oscillator requires a start-up and

stabilization time before use. Thus,

T1OSCEN should be set and a suitable

delay observed prior to enabling Timer1.

Note:

When switching from synchronous to

asynchronous operation, it is possible to

skip an increment. When switching from

asynchronous to synchronous operation,

it is possible to produce a single spurious

increment.

Note:

TMR1GE bit of the T1CON register must

be set to use the Timer1 gate.

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