PIC16F883-ESLASHSO. datasheet(185/338 Pages) MICROCHIP

185 / 338 page

 2006-2012 Microchip Technology Inc.

DS41291G-page 185

PIC16F882/883/884/886/887

SSPCON: SSP CONTROL REGISTER 1

R/W-0

WCOL

SSPOV

SSPEN

CKP

SSPM3

SSPM2

SSPM1

SSPM0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is cleared

x = Bit is unknown

bit 7

WCOL: Write Collision Detect bit

Master mode:

1 = A write to the SSPBUF register was attempted while the I2C conditions were not valid for a transmission to be started

0 = No collision

Slave mode:

1 = The SSPBUF register is written while it is still transmitting the previous word (must be cleared in software)

0 = No collision

bit 6

SSPOV: Receive Overflow Indicator bit

In SPI mode:

1 = A new byte is received while the SSPBUF register is still holding the previous data. In case of overflow, the data in SSPSR

is lost. Overflow can only occur in Slave mode. In Slave mode, the user must read the SSPBUF, even if only transmitting

data, to avoid setting overflow. In Master mode, the overflow bit is not set since each new reception (and transmission) is

initiated by writing to the SSPBUF register (must be cleared in software).

0 = No overflow

In I2C mode:

1 = A byte is received while the SSPBUF register is still holding the previous byte. SSPOV is a “don’t care” in Transmit

mode (must be cleared in software).

0 = No overflow

bit 5

SSPEN: Synchronous Serial Port Enable bit

In both modes, when enabled, these pins must be properly configured as input or output

In SPI mode:

1 = Enables serial port and configures SCK, SDO, SDI and SS as the source of the serial port pins

0 = Disables serial port and configures these pins as I/O port pins

In I2C mode:

1 = Enables the serial port and configures the SDA and SCL pins as the source of the serial port pins

0 = Disables serial port and configures these pins as I/O port pins

bit 4

CKP: Clock Polarity Select bit

In SPI mode:

1 = Idle state for clock is a high level

0 = Idle state for clock is a low level

In I2C Slave mode:

SCK release control

1 = Release clock

0 = Holds clock low (clock stretch). (Used to ensure data setup time.)

In I2C Master mode:

Unused in this mode

bit 3-0

SSPM<3:0>: Synchronous Serial Port Mode Select bits

0000 = SPI Master mode, clock = FOSC/4

0001 = SPI Master mode, clock = FOSC/16

0010 = SPI Master mode, clock = FOSC/64

0011 = SPI Master mode, clock = TMR2 output/2

0100 = SPI Slave mode, clock = SCK pin, SS pin control enabled

0101 = SPI Slave mode, clock = SCK pin, SS pin control disabled, SS can be used as I/O pin

0110 = I2C Slave mode, 7-bit address

0111 = I2C Slave mode, 10-bit address

1000 = I2C Master mode, clock = FOSC / (4 * (SSPADD+1))

1001 = Load Mask function

1010 = Reserved

1011 = I2C firmware controlled Master mode (Slave idle)

1100 = Reserved

1101 = Reserved

1110 = I2C Slave mode, 7-bit address with Start and Stop bit interrupts enabled

1111 = I2C Slave mode, 10-bit address with Start and Stop bit interrupts enabled

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