LAN8720AI datasheet(71/79 Pages) SMSC

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Small Footprint RMII 10/100 Ethernet Transceiver with HP Auto-MDIX Support

Datasheet

SMSC LAN8720A/LAN8720Ai

Revision 1.4 (08-23-12)

DATASHEET

5.5.4

RMII Interface Timing

5.5.4.1

RMII Timing (REF_CLK Out Mode)

The 50MHz REF_CLK OUT timing applies to the case when nINTSEL is pulled-low. In this mode, a

25MHz crystal or clock oscillator must be input on the XTAL1/CLKIN and XTAL2 pins. For more

information on REF_CLK Out Mode, see Section 3.7.4.2, "REF_CLK Out Mode," on page 34.

Note 5.16 Timing was designed for system load between 10 pf and 25 pf.

Figure 5.4 RMII Timing (REF_CLK Out Mode)

Table 5.9 RMII Timing Values (REF_CLK Out Mode)

SYMBOL

DESCRIPTION

MIN

MAX

UNITS

NOTES

tclkp

REFCLKO period

tclkh

REFCLKO high time

tclkp*0.4

tclkp*0.6

tclkl

REFCLKO low time

tclkp*0.4

tclkp*0.6

toval

RXD[1:0], RXER, CRS_DV output valid from

rising edge of REFCLKO

5.0

Note 5.16

tohold

RXD[1:0], RXER, CRS_DV output hold from

rising edge of REFCLKO

1.4

Note 5.16

tsu

TXD[1:0], TXEN setup time to rising edge of

REFCLKO

7.0

Note 5.16

tihold

TXD[1:0], TXEN input hold time after rising edge

of REFCLKO

2.0

Note 5.16

REFCLKO

RXD[1:0],

RXER

CRS_DV

tclkh

tclkl

tclkp

toval

tohold

toval

tohold

tsu

TXD[1:0]

TXEN

tihold

tsu tihold

tihold

tsu

tihold

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