LAN9500AI datasheet(13/66 Pages) SMSC

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USB 2.0 to 10/100 Ethernet Controller

Datasheet

SMSC LAN950x Family

Revision 1.1 (04-18-13)

DATASHEET

Table 3.1 MII Interface Pins

NUM PINS

NAME

SYMBOL

BUFFER

TYPE

DESCRIPTION

Receive Error

(External

PHY Mode)

RXER

(PD)

In external PHY mode, the signal on this pin is

input from the external PHY and indicates a

receive error in the packet. In internal PHY mode,

this pin is not used.

Transmit

Enable

(External

PHY Mode)

TXEN

(PD)

In external PHY mode, this pin functions as an

output to the external PHY and indicates valid

data on TXD[3:0]. In internal PHY mode, this pin

is not used.

Receive Data

Valid

(External

PHY Mode)

RXDV

(PD)

In external PHY mode, the signal on this pin is

input from the external PHY and indicates valid

data on RXD[3:0]. In internal PHY mode, this pin

is not used.

Receive

Clock

(External

PHY Mode)

RXCLK

(PD)

In external PHY mode, this pin is the receiver

clock input from the external PHY. In internal

PHY mode, this pin is not used.

Carrier Sense

(External

PHY Mode)

CRS

(PD)

In external PHY mode, the signal on this pin is

input from the external PHY and indicates a

network carrier.

General

Purpose I/O 3

(Internal PHY

Mode Only)

GPIO3

IS/O8/

OD8

(PU)

This General Purpose I/O pin is fully

programmable as either a push-pull output, an

open-drain output, or a Schmitt-triggered input.

MII Collision

Detect

(External

PHY Mode)

COL

(PD)

In external PHY mode, the signal on this pin is

input from the external PHY and indicates a

collision event.

General

Purpose I/O 0

(Internal PHY

Mode Only)

GPIO0

IS/O8/

OD8

(PU)

This General Purpose I/O pin is fully

programmable as either a push-pull output, an

open-drain output, or a Schmitt-triggered input.

Note:

(LAN9500A/LAN9500Ai only)

This pin may be used to signal PME

when Internal PHY and PME modes of

operation are in effect. Refer to

Chapter 6, "PME Operation," on

page 41 for additional information.

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