 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
LAN9500AI 데이터시트(PDF) 57 Page - SMSC Corporation |
|
|
|||||||||||||||||||||||||||||
LAN9500AI 데이터시트(HTML) 57 Page - SMSC Corporation |
|
|
57 / 66 page  USB 2.0 to 10/100 Ethernet Controller Datasheet SMSC LAN950x Family 57 Revision 1.1 (04-18-13) DATASHEET 8.5.4 EEPROM Timing The following specifies the EEPROM timing requirements for the device: Figure 8.4 EEPROM Timing Table 8.17 EEPROM Timing Values SYMBOL DESCRIPTION MIN TYP MAX UNITS tckcyc EECLK Cycle time 1110 1130 ns tckh EECLK High time 550 570 ns tckl EECLK Low time 550 570 ns tcshckh EECS high before rising edge of EECLK 1070 ns tcklcsl EECLK falling edge to EECS low 30 ns tdvckh EEDO valid before rising edge of EECLK 550 ns tckhdis EEDO disable after rising edge EECLK 550 ns tdsckh EEDI setup to rising edge of EECLK 90 ns tdhckh EEDI hold after rising edge of EECLK 0 ns tckldis EECLK low to data disable (OUTPUT) 580 ns tcshdv EEDIO valid after EECS high (VERIFY) 600 ns tdhcsl EEDIO hold after EECS low (VERIFY) 0 ns tcsl EECS low 1070 ns EECLK EEDO EEDI EECS tckldis tcshckh EEDI (VERIFY) tckh tckl tckcyc tcklcsl tcsl tdvckh tckhdis tdsckh tdhckh tdhcsl tcshdv |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
