전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

M95128-RMB6TG 데이터시트(PDF) 23 Page - STMicroelectronics

부품명 M95128-RMB6TG
상세설명  128-Kbit serial SPI bus EEPROM with high-speed clock
PDF  49 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M95128-RMB6TG 데이터시트(HTML) 23 Page - STMicroelectronics

Back Button M95128-RMB6TG Datasheet HTML 19Page - STMicroelectronics M95128-RMB6TG Datasheet HTML 20Page - STMicroelectronics M95128-RMB6TG Datasheet HTML 21Page - STMicroelectronics M95128-RMB6TG Datasheet HTML 22Page - STMicroelectronics M95128-RMB6TG Datasheet HTML 23Page - STMicroelectronics M95128-RMB6TG Datasheet HTML 24Page - STMicroelectronics M95128-RMB6TG Datasheet HTML 25Page - STMicroelectronics M95128-RMB6TG Datasheet HTML 26Page - STMicroelectronics M95128-RMB6TG Datasheet HTML 27Page - STMicroelectronics Next Button
Zoom Inzoom in Zoom Outzoom out
 23 / 49 page
background image
M95128-W M95128-R M95128-DF
Instructions
Doc ID 5798 Rev 16
23/49
1.
Depending on the memory size, as shown in Table 5, the most significant address bits are Don’t Care.
In the case of Figure 13, Chip Select (S) is driven high after the eighth bit of the data byte
has been latched in, indicating that the instruction is being used to write a single byte.
However, if Chip Select (S) continues to be driven low, as shown in Figure 14, the next byte
of input data is shifted in, so that more than a single byte, starting from the given address
towards the end of the same page, can be written in a single internal Write cycle.
Each time a new data byte is shifted in, the least significant bits of the internal address
counter are incremented. If more bytes are sent than will fit up to the end of the page, a
condition known as “roll-over” occurs. In case of roll-over, the bytes exceeding the page size
are overwritten from location 0 of the same page.
The instruction is not accepted, and is not executed, under the following conditions:
●
if the Write Enable Latch (WEL) bit has not been set to 1 (by executing a Write Enable
instruction just before),
●
if a Write cycle is already in progress,
●
if the device has not been deselected, by driving high Chip Select (S), at a byte
boundary (after the eighth bit, b0, of the last data byte that has been latched in),
●
if the addressed page is in the region protected by the Block Protect (BP1 and BP0)
bits.
Note:
The self-timed write cycle tW is internally executed as a sequence of two consecutive
events: [Erase addressed byte(s)], followed by [Program addressed byte(s)]. An erased bit is
read as “0” and a programmed bit is read as “1”.
Figure 13.
Byte Write (WRITE) sequence
C
D
AI01795D
S
Q
15
2
1
3456789 10
20 21 22 23 24 25 26 27
14 13
3210
28 29 30
High Impedance
Instruction
16-Bit Address
0
765432
0
1
Data Byte
31



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com