JS28F128P30TF75A datasheet(64/90 Pages) MICRON

64 / 90 page

P30-65nm SBC

Datasheet

Apr 2010

Order Number: 208033-02

Table 34: System Interface Information

Offset

Length

Description

Add

Hex

Code

Value

1Bh

VCC logic supply minimum program/erase voltage

bits 0-3 BCD 100 mV

bits 4-7 BCD volts

1B:

--17

1.7V

1Ch

VCC logic supply maximum program/erase voltage

bits 0-3 BCD 100 mV

bits 4-7 BCD volts

1C:

--20

2.0V

1Dh

VPP [programming] supply minimum program/erase voltage

bits 0-3 BCD 100 mV

bits 4-7 HEX volts

1D:

--85

8.5V

1Eh

VPP [programming] supply maximum program/erase voltage

bits 0-3 BCD 100 mV

bits 4-7 HEX volts

1E:

--95

9.5V

1Fh

“n” such that typical single word program time-out = 2n

µ-sec

1F:

--06

µs

20h

“n” such that typical full buffer write time-out = 2n

µ-sec

20:

--09

512

µs

21h

“n” such that typical block erase time-out = 2n m-sec

21:

--09

0.5s

22h

“n” such that typical full chip erase time-out = 2n m-sec

22:

--00

23h

“n” such that maximum word program time-out = 2n times

typical

23:

--02

256

µs

24h

“n” such that maximum buffer write time-out = 2n times

typical

24:

--02

2048

µs

25h

“n” such that maximum block erase time-out = 2n times

typical

25:

--03

26h

“n” such that maximum chip erase time-out = 2n times typical

26:

--00

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