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JS28F128P30TF75A 데이터시트(PDF) 41 Page - Micron Technology |
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JS28F128P30TF75A 데이터시트(HTML) 41 Page - Micron Technology |
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41 / 90 page ![]() Datasheet Apr 2010 41 Order Number:208033-02 P30-65nm SBC bits, as long as the register remains unlocked. Additionally, because the Lock Register bits themselves are OTP, when programmed, Lock Register bits cannot be erased. Therefore, when a OTP Register is locked, it cannot be unlocked. 11.3.1 Reading the OTP Registers The OTP Registers can be read from OTP-RA address. To read the OTP Register, first issue the Read Device Identifier command at OTP-RA address to place the device in the Read Device Identifier state (see Section 6.2, “Device Command Bus Cycles” on page 20). Next, perform a read operation using the address offset corresponding to the register to be read. Table 8, “Device Identifier Information” on page 22 shows the address offsets of the OTP Registers and Lock Registers. OTP Registers and Lock Registers data is read 16 bits at a time. Figure 14: OTP Register Map 0x89 Lock Register 1 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 0x102 0x109 0x8A 0x91 128-bit OTP Register 16 (User-Programmable) 128-bit OTP Register 1 (User-Programmable) 0x88 0x85 64-bit Segment (User-Programmable) 0x84 0x81 0x80 Lock Register 0 64-bit Segment (Factory-Programmed) 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 128-Bit OTP Register 0 |
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