EMC1413 datasheet(41/52 Pages) SMSC

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Multiple Channel 1°C Temperature Sensors with Beta Compensation

Datasheet

SMSC EMC1413 / EMC1414

Revision 1.41 (02-23-12)

DATASHEET

7.16

Low Limit Status Register

The Low Limit Status Register contains the status bits that are set when a temperature channel drops

below the low limit. If any of these bits are set, then the LOW status bit in the Status Register is set.

Reading from the Low Limit Status Register will clear all bits. Reading from the register will also clear

the LOW status bit in the Status Register.

The ALERT pin will be set if the programmed number of consecutive alert counts have been met and

any of these status bits are set.

The status bits will remain set until read unless the ALERT pin is configured as a comparator output

(see Section 6.3.2).

Bit 3 - E3LOW (EMC1414 only) - This bit is set when the External Diode 3 channel drops below its

programmed low limit.

Bit 2 - E2LOW - This bit is set when the External Diode 2 channel drops below its programmed low

limit.

Bit 1 - E1LOW - This bit is set when the External Diode 1 channel drops below its programmed low

limit.

Bit 0 - ILOW - This bit is set when the Internal Diode channel drops below its programmed low limit.

7.17

Therm Limit Status Register

The Therm Limit Status Register contains the status bits that are set when a temperature channel

Therm Limit is exceeded. If any of these bits are set, the THERM status bit in the Status Register is

set. Reading from the Therm Limit Status Register will not clear the status bits. Once the temperature

drops below the Therm Limit minus the Therm Hysteresis, the corresponding status bits will be

automatically cleared. The THERM bit in the Status Register will be cleared when all individual channel

THERM bits are cleared.

Bit 3 - E3THERM (EMC1414 only) - This bit is set when the External Diode 3 channel exceeds its

programmed Therm Limit. When set, this bit will assert the THERM pin.

Bit 2 - E2THERM - This bit is set when the External Diode 2 channel exceeds its programmed Therm

Limit. When set, this bit will assert the THERM pin.

Bit 1 - E1THERM - This bit is set when the External Diode 1 channel exceeds its programmed Therm

Limit.

Bit 0- ITHERM - This bit is set when the Internal Diode channel exceeds its programmed Therm Limit.

When set, this bit will assert the THERM pin.

Table 7.21 Low Limit Status Register

ADDR.

R/W

DEFAULT

36h

R-C

Low Limit

Status

E3LOW

E2LOW

E1LOW

ILOW

00h

Table 7.22 Therm Limit Status Register

ADDR.

R/W

DEFAULT

37h

R-C

Therm

Limit

Status

THERM

ITHERM

00h

EMC1413 데이터시트(PDF) 41 Page - SMSC Corporation

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