AD9848AKST datasheet(30/32 Pages) AD

부품명	AD9848AKST

상세설명	CCD Signal Processors with Integrated Timing Driver

PDF	32 Pages

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30 / 32 page

REV. A

AD9848/AD9849

–30–

CCD IMAGER

SIGNAL

OUT

AD9848/AD9849

CCDIN

Figure 22b. CCD Connections (4 H-Clock)

CLI

MASTER CLOCK

AD9848/AD9849

ASIC

Figure 23a. CLI Connection, DC-Coupled

CLI

MASTER CLOCK

AD9848/AD9849

ASIC

LPF

1nF

Figure 23b. CLI Connection, AC-Coupled

Internal Mode Circuit Configuration

The AD9848/AD9849 may be used in Internal Mode using the

circuit configuration of Figure 24. Internal Mode uses the same

circuit as Figure 21, except that the horizontal pulses (CLPOB,

CLPDM, PBLK, and HBLK) are internally generated in the

AD9848/AD9849. These pins may be grounded when Internal

Mode is used. Only the HD and VD signals are required from

the ASIC.

HD/VD

INPUTS

AD9848/AD9849

Figure 24. Internal Mode Circuit Configuration

TIMING EXAMPLES FOR DIFFERENT SEQUENCES

SEQUENCE 3

SEQUENCE 2

Figure 25. Typical CCD

AD9848AKST 데이터시트(PDF) 30 Page - Analog Devices