| 전자부품 데이터시트 검색엔진 |
|
TN8044AH-R0117 데이터시트(PDF) 48 Page - InnovASIC, Inc |
|
|
|||||||||||||||||||||||||||||
TN8044AH-R0117 데이터시트(HTML) 48 Page - InnovASIC, Inc |
|
48 / 65 page ![]() IA8044/IA8344 Data Sheet SDLC Communications Controller March 30, 2010 IA211010112-04 http://www.Innovasic.com UNCONTROLLED WHEN PRINTED OR COPIED Customer Support: Page 48 of 65 1-888-824-4184 ® 4.15.2 BYP The BYP contains registers and controllers used to perform the manipulations required for SDLC communications. The BYP registers may be accessed by the CPU (see Table 7, SFR Bit Addressable Locations). The BYP contains the SIU state machine that controls transmission and reception of frames. 4.16 Diagnostics A diagnostic mode is included with the IA8044/IA8344 to allow testing of the SIU. Diagnostics use port pins P3.0 and P3.1. Writing a ―0‖ to P3.1 enables the diagnostic mode. When P3.1 is cleared, writing data to P3.0 has the effect of writing a serial data stream to the SIU. P3.0 is the serial data and any write to Port 3 will clock SCLK. The transmit data may be monitored on P3.1 with any write to Port 3, again clocking SCLK. In the test mode P3.0 and P3.1 pins are placed in the high impedance state (see Figure 12). |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |