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TAS5706APAPR 데이터시트(PDF) 46 Page - Texas Instruments

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부품명 TAS5706APAPR
상세설명  20-W Stereo Digital Audio Power Amplifier with EQ and DRC
PDF  71 Pages
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제조업체  TI1 [Texas Instruments]
홈페이지  http://www.ti.com
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TAS5706APAPR 데이터시트(HTML) 46 Page - Texas Instruments

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SERIAL DATA INTERFACE REGISTER (0x04)
SYSTEM CONTROL REGISTER 2 (0x05)
TAS5706A
TAS5706B
SLOS606D – MARCH 2009 – REVISED SEPTEMBER 2009............................................................................................................................................. www.ti.com
Table 7. System Control Register 1 (0x03) (continued)
D7
D6
D5
D4
D3
D2
D1
D0
FUNCTION
–
–
–
–
1
–
–
–
Disable clock autodetect
–
–
–
–
–
0
–
–
Enable soft start (1)
–
–
–
–
–
1
–
–
Disable soft start
–
–
–
–
–
–
0
0
No de-emphasis (1)
–
–
–
–
–
–
0
1
Reserved
–
–
–
–
–
–
1
0
De-emphasis for fS = 44.1 kHz
–
–
–
–
–
–
1
1
De-emphasis for fS = 48 kHz
As shown in NoLabel , TAS5706A supports 21 serial data modes. The default is 24-bit, I2S mode,
Serial Data Interface Control Register (0x04) Format
RECEIVE SERIAL DATA
WORD
D7–D5
D4
D3
D2
D1
D0
INTERFACE FORMAT
LENGTH
Right-justified
16
000
0
0
0
0
0
Right-justified
20
000
0
0
0
0
1
Right-justified
24
000
0
0
0
1
0
I2S
16
000
0
0
0
1
1
I2S
20
000
0
0
1
0
0
I2S (1)
24
000
0
0
1
0
1
Left-justified
16
000
0
0
1
1
0
Left-justified
20
000
0
0
1
1
1
Left-justified
24
000
0
1
0
0
0
Reserved
000
0
1
0
0
1
Right-justified
18
000
0
1
0
1
0
Reserved
000
0
1
0
1
1
Reserved
000
0
1
1
0
0
Reserved
000
0
1
1
0
1
Reserved
000
0
1
1
1
0
Reserved
000
0
1
1
1
1
Reserved
000
1
0
0
0
0
I2S (32 fS SCLK)
16
000
1
0
0
1
1
Left-justified (32 fS SCLK)
000
1
0
1
1
0
Reserved
000
1
1
0
0
1
Reserved
000
1
1
0
1
1
Reserved
000
1
1
1
0
1
(1)
Default values are in bold.
Bit D6 is a control bit and bit D5 is a configuration bit.
When bit D6 is set low, the system starts playing; otherwise, the outputs are shut down.
Bit D5 defines the configuration of the system, that is, it determines what configuration the system runs in when
bit D6 is set low. When this bit is asserted, all channels are switching. Otherwise, only a subset of the PWM
channels will run. The channels to shut down are defined in the shutdown group register (0x19). Bit D5 should
only be changed when bit D6 is set, meaning that it is only possible to switch configurations by resetting the DAP
and then restarting it again in the new configuration.
46
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Copyright © 2009, Texas Instruments Incorporated
Product Folder Link(s): TAS5706A TAS5706B
TAS5706A is Not Recommended for New Designs



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