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M24C32-FDW6TP 데이터시트(PDF) 18 Page - STMicroelectronics |
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M24C32-FDW6TP 데이터시트(HTML) 18 Page - STMicroelectronics |
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18 / 40 page ![]() Instructions M24C32-W M24C32-R M24C32-F M24C32-X M24C32-DF 18/40 Doc ID 4578 Rev 21 5.1.5 ECC (Error Correction Code) and Write cycling The Error Correction Code (ECC) is an internal logic function which is transparent for the I2C communication protocol. The ECC logic is implemented on each group of four EEPROM bytes(a). Inside a group, if a single bit out of the four bytes happens to be erroneous during a Read operation, the ECC detects this bit and replaces it with the correct value. The read reliability is therefore much improved. Even if the ECC function is performed on groups of four bytes, a single byte can be written/cycled independently. In this case, the ECC function also writes/cycles the three other bytes located in the same group(a). As a consequence, the maximum cycling budget is defined at group level and the cycling can be distributed over the 4 bytes of the group: the sum of the cycles seen by byte0, byte1, byte2 and byte3 of the same group must remain below the maximum value defined in Table 12: Cycling performance by groups of four bytes. a. A group of four bytes is located at addresses [4*N, 4*N+1, 4*N+2, 4*N+3], where N is an integer. |
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