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M24C32-FDW6TP 데이터시트(PDF) 20 Page - STMicroelectronics

부품명 M24C32-FDW6TP
상세설명  32-Kbit serial I짼C bus EEPROM
PDF  40 Pages
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제조업체  STMICROELECTRONICS [STMicroelectronics]
홈페이지  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

M24C32-FDW6TP 데이터시트(HTML) 20 Page - STMicroelectronics

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Instructions
M24C32-W M24C32-R M24C32-F M24C32-X M24C32-DF
20/40
Doc ID 4578 Rev 21
5.2
Read operations
Read operations are performed independently of the state of the Write Control (WC) signal.
After the successful completion of a Read operation, the device’s internal address counter is
incremented by one, to point to the next byte address.
For the Read instructions, after each byte read (data out), the device waits for an
acknowledgment (data in) during the 9th bit time. If the bus master does not acknowledge
during this 9th time, the device terminates the data transfer and switches to its Standby
mode.
Figure 9.
Read mode sequences
5.2.1
Random Address Read
A dummy Write is first performed to load the address into this address counter (as shown in
Figure 9) but without sending a Stop condition. Then, the bus master sends another Start
condition, and repeats the device select code, with the RW bit set to 1. The device
acknowledges this, and outputs the contents of the addressed byte. The bus master must
not acknowledge the byte, and terminates the transfer with a Stop condition.
Dev sel *
Byte addr
Byte addr
Dev sel
Data out 1
AI01105d
Data out N
Current
Address
Read
Dev sel
Data out
Random
Address
Read
Dev sel *
Data out
Sequential
Current
Read
Data out N
Dev sel *
Byte addr
Byte addr
Sequention
Random
Read
Dev sel *
Data out1
ACK
R/W
NO ACK
ACK
R/W
ACK
ACK
ACK
R/W
ACK
ACK
ACK
NO ACK
R/W
NO ACK
ACK
ACK
ACK
R/W
ACK
ACK
R/W
ACK
NO ACK



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