ADM1026JSTZ-R7 datasheet(43/55 Pages) ONSEMI

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ADM1026

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Table 43. REGISTER 1DH, MASK REGISTER 6 (POWER-ON DEFAULT, 00H)

Bit

Name

R/W

Description

GPIO8 Mask = 0

R/W

When this bit is set, interrupts generated on the GPIO8 channel are masked out.

GPIO9 Mask = 0

R/W

When this bit is set, interrupts generated on the GPIO9 channel are masked out.

GPIO10 Mask = 0

R/W

When this bit is set, interrupts generated on the GPIO10 channel are masked out.

GPIO11Mask = 0

R/W

When this bit is set, interrupts generated on the GPIO11 channel are masked out.

GPIO12 Mask = 0

R/W

When this bit is set, interrupts generated on the GPIO12 channel are masked out.

GPIO13 Mask = 0

R/W

When this bit is set, interrupts generated on the GPIO13 channel are masked out.

GPIO14 Mask = 0

R/W

When this bit is set, interrupts generated on the GPIO14 channel are masked out.

GPIO15 Mask = 0

R/W

When this bit is set, interrupts generated on the GPIO15 channel are masked out.

Table 44. REGISTER 1EH, INT TEMP OFFSET (POWER-ON DEFAULT, 00H)

Bit

Name

R/W

Description

7–0

Int Temp Offset

R/W

This register contains the offset value for the internal temperature channel, a twos

complement result before it is stored or compared to limits. In this way, a sort of

one-point calibration can be done whereby the whole transfer function of the channel

can be moved up or down. From a software point of view, this may be a very simple

method to vary the characteristics of the measurement channel if the thermal

characteristics change for any reason (for instance from one chassis to another), if

the measurement point is moved, if a plug-in card is inserted or removed, and so on.

Table 45. REGISTER 1FH, INT TEMP MEASURED VALUE (POWER-ON DEFAULT, 00H)

Bit

Name

R/W

Description

7–0

Int Temp Value

This register contains the measured value of the internal temperature channel.

Table 46. REGISTER 20H, STATUS REGISTER 1 (POWER-ON DEFAULT, 00H)

Bit

Name

R/W

Description

Ext1 Temp Status = 0

1, if Ext1 value is above the high limit or below the low limit on the previous

conversion cycle; 0 otherwise. This bit is set (once only) if a THERM mode is

engaged as a result of Ext1 temp readings exceeding the Ext1 THERM limit. This bit

is also set (once only) if THERM mode is disengaged as a result of Ext1 temperature

readings going 5C below Ext1 THERM limit.

Ext2 Temp Status = 0

1, if Ext 2 value (or AIN9 if in voltage measurement mode) is above the /AIN9 status =

0 high limit or below the low limit on the previous conversion cycle; 0 otherwise. This

bit is set (once only) if a THERM mode is engaged as a result of Ext2 temperature

readings exceeding the Ext2 THERM limit. This bit is also set (once only) if THERM

mode is disengaged as a result of Ext2 temperature readings going 5C below Ext2

THERM limit.

3.3 V STBY Status = 0

1, if 3.3 V STBY value is above the high limit or below the low limit on the previous