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AGLP030 데이터시트(PDF) 90 Page - Microsemi Corporation

부품명 AGLP030
상세설명  IGLOO PLUS Low Power Flash FPGAs
PDF  134 Pages
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제조업체  MICROSEMI [Microsemi Corporation]
홈페이지  http://www.microsemi.com
Logo MICROSEMI - Microsemi Corporation

AGLP030 데이터시트(HTML) 90 Page - Microsemi Corporation

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IGLOO PLUS DC and Switching Characteristics
2-76
Revision 16
Timing Characteristics
1.5 V DC Core Voltage
Table 2-96 • FIFO
Worst Commercial-Case Conditions: TJ = 70°C, VCC = 1.425 V
Parameter
Description
Std.
Units
tENS
REN, WEN Setup Time
1.66
ns
tENH
REN, WEN Hold Time
0.13
ns
tBKS
BLK Setup Time
0.30
ns
tBKH
BLK Hold Time
0.00
ns
tDS
Input Data (WD) Setup Time
0.63
ns
tDH
Input Data (WD) Hold Time
0.20
ns
tCKQ1
Clock High to New Data Valid on RD (flow-through)
2.77
ns
tCKQ2
Clock High to New Data Valid on RD (pipelined)
1.50
ns
tRCKEF
RCLK High to Empty Flag Valid
2.94
ns
tWCKFF
WCLK High to Full Flag Valid
2.79
ns
tCKAF
Clock High to Almost Empty/Full Flag Valid
10.71
ns
tRSTFG
RESET Low to Empty/Full Flag Valid
2.90
ns
tRSTAF
RESET Low to Almost Empty/Full Flag Valid
10.60
ns
tRSTBQ
RESET Low to Data Out Low on RD (flow-through)
1.68
ns
RESET Low to Data Out Low on RD (pipelined)
1.68
ns
tREMRSTB
RESET Removal
0.51
ns
tRECRSTB
RESET Recovery
2.68
ns
tMPWRSTB
RESET Minimum Pulse Width
0.68
ns
tCYC
Clock Cycle Time
6.24
ns
FMAX
Maximum Frequency for FIFO
160
MHz
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.



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