AM79C32AVC datasheet(54/101 Pages) AMD

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Am79C30A/32A Data Sheet

Intelligent NT

Either Slave mode can be used to implement the Intel-

ligent NT configuration. The diagram below depicts this

configuration using DSC Slave mode with bus reversal

disabled.

The U-transceiver operates as the IOM-2 master de-

vice, programmed to TE mode and outputting at

1536-kHz DCL. The DSC indicates a D-channel re-

quest according to the TIC bus procedure using the

BAC bit on the DU line (BAC=0). The S-transceiver sur-

veys the received D channel and if it is idle, enables the

DSC to send its D-channel frame to the U-transceiver

on DU by driving S/G low on DD. The S-transceiver

also sets its transmitted E-channel bits on the S-Inter-

face to zero (inversion of received D bits) to prevent all

connected TEs from transmitting data into the D-chan-

nel. When the DSC completes its D-channel transmis-

sion, it releases the TIC bus by setting BAC=1. The

S-transceiver then mirrors the incoming D bits into the

E-channel, thus behaving as a normal NT with trans-

parent D-channel handling.

DSC

SBOUT

SBIN

D-channel

E-channel

B1, B2, D, MON0, C/I0,

upstream

downstream

Figure 11.

IOM-2 Intelligent Configuration

DOUT/DD

DIN/DU

U-transceiver

Master

IC1, IC2, MON1, C/I1, S/G(in), TIC(out)

S-transceiver

LT-S

S Interface

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