AM79C960KC datasheet(86/127 Pages) AMD

86 / 127 page

P R E L I M I N A R Y

AMD

1-428

Am79C960

ABOE BPAM SMAM

A0–X

D0–7

A0–X

D0–7

SRWE

A0–X

D0–7

PRAB0–15

PRDB0–7

BPCS

SROE

APCS

ISA

Bus

16-Bit System Data

System

Address

PCnet-ISA

Controller

16-Bit Private Address Bus

Ethernet

Address

PROM

8-Bit

SRAM

16907B-6

Address

Buffer

Address

Compare

Boot

PROM

8-Bit Private Data

Shared Memory Block Diagram

Address PROM Interface

The suggested address PROM is the Am27LS19, a

32x8 device.

APCS should be connected directly to the

device’s

G input.

A4–A0

Q7–Q0

27LS19

32 x 8 PROM

16907B-16

Address PROM Example

Boot PROM Interface

The boot PROM is a 16Kx8 EPROM. Its program pin

should be tied to VCC, output enable

OE tied to ground,

and chip enable

CE to BPCS to minimize power con-

sumption at the expense of speed. If speed is more

important, then ground

CE and connect OE to BPCS.

27C128

16K x 8 EPROM

16907B-17

A13–A0

DQ7–DQ0

Boot PROM Example

Static RAM Interface (for Shared Memory

only)

The SRAM is an 8Kx8 or 32Kx8 device. The PCnet-ISA

controller can support 64 Kbytes of SRAM address

space. The PCnet-ISA controller provides

SROE and

SRWE outputs which can go directly to the OE and WE

pins of the SRAM, respectively. The address lines are

connected as described in the shared memory section

and the data lines go to the Private Data Bus.

AUI

The PCnet-ISA controller drives the AUI interface

through a set of transformers. The DI and CI inputs

should each be terminated with a pair of matched 39

Ω

or 40.2

Ω resistors connected in series with the middle

node bypassed to ground with a .01

µF to 0.1 µF

capacitor. Refer to the PCnet-ISA Technical Manual

(PID #16850B) for network interface design and refer to

Appendix A for a list of compatible AUI isolation

transformers.

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