AM79C976 datasheet(97/309 Pages) AMD

97 / 309 page

8/01/00

Am79C976

P R E L I M INARY

boundary in the EEPROM. If an even number of regis-

ters need to be loaded from the EEPROM, two dupli-

cate entries for the same register can be included so

that the CRC is aligned properly.

For full compatibility with legacy Magic Packet soft-

ware, the EEPROM should initialize both the APROM

area (offset 0-0Fh) and the PADR Register.

Data are shifted into or out of the EEPROM most sig-

nificant bit first.

Figure 41 shows the mapping of the 3-byte entries into

the 16-bit word-oriented EEPROM.

If the Am79C976 device detects a CRC error in the EE-

PROM or fails to detect the presence of an EEPROM,

it restores all registers to their default values and clears

the PVALID bit in BCR19 to indicate the error.

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