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IO96PDB2V1 데이터시트(PDF) 58 Page - Microsemi Corporation |
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IO96PDB2V1 데이터시트(HTML) 58 Page - Microsemi Corporation |
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58 / 242 page ![]() ProASIC3L DC and Switching Characteristics 2-42 Revision 13 Single-Ended I/O Characteristics 3.3 V LVTTL / 3.3 V LVCMOS Low voltage transistor–transistor Logic (LVTTL) is a general-purpose standard (EIA/JESD) for 3.3 V applications. This standard uses an LVTTL input buffer and push-pull output buffer. Furthermore, all LVCMOS 3.3 V software macros comply with LVCMOS 3.3 V wide range, as specified in the JESD8-A specification. Table 2-46 • Minimum and Maximum DC Input and Output Levels Applicable to Pro I/O Banks 3.3 V LVTTL / 3.3 V LVCMOS VIL VIH VOL VOH IOL IOH IOSL IOSH IIL IIH Drive Strength Min. V Max. V Min. V Max. V Max. V Min. VmA mA Max. mA1 Max. mA1 µA2 µA2 4 mA –0.3 0.8 2 3.6 0.4 2.4 4 4 25 27 10 10 6 mA –0.3 0.8 2 3.6 0.4 2.4 8 8 51 54 10 10 8 mA –0.3 0.8 2 3.6 0.4 2.4 12 12 103 109 10 10 12 mA –0.3 0.8 2 3.6 0.4 2.4 16 16 132 127 10 10 16 mA –0.3 0.8 2 3.6 0.4 2.4 24 24 268 181 10 10 24 mA –0.3 0.8 2 3.6 0.4 2.4 24 24 27 25 10 10 Notes: 1. Currents are measured at 100°C junction temperature and maximum voltage. 2. Currents are measured at 85°C junction temperature. 3. Software default selection highlighted in gray. Table 2-47 • Minimum and Maximum DC Input and Output Levels Applicable to Advanced I/O Banks 3.3 V LVTTL / 3.3 V LVCMOS VIL VIH VOL VOH IOL IOH IOSL IOSH IIL IIH Drive Strength Min. V Max. V Min. V Max. V Max. V Min. VmA mA Max. mA1 Max. mA1 µA2 µA2 2 mA –0.3 0.8 2 3.6 0.4 2.4 2 2 25 27 10 10 4 mA –0.3 0.8 2 3.6 0.4 2.4 4 4 25 27 10 10 6 mA –0.3 0.8 2 3.6 0.4 2.4 6 6 51 54 10 10 8 mA –0.3 0.8 2 3.6 0.4 2.4 8 8 51 54 10 10 12 mA –0.3 0.8 2 3.6 0.4 2.4 12 12 103 109 10 10 16 mA –0.3 0.8 2 3.6 0.4 2.4 16 16 132 127 10 10 24 mA –0.3 0.8 2 3.6 0.4 2.4 24 24 268 181 10 10 Notes: 1. Currents are measured at 100°C junction temperature and maximum voltage. 2. Currents are measured at 85°C junction temperature. 3. Software default selection highlighted in gray. |
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