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EP2C8 데이터시트(PDF) 35 Page - Altera Corporation

부품명 EP2C8
상세설명  Section I. Cyclone II Device Family Data Sheet
PDF  168 Pages
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제조업체  ALTERA [Altera Corporation]
홈페이지  http://www.altera.com
Logo ALTERA - Altera Corporation

EP2C8 데이터시트(HTML) 35 Page - Altera Corporation

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Altera Corporation
2–23
February 2007
Cyclone II Device Handbook, Volume 1
Cyclone II Architecture
Global Clock Network Distribution
Cyclone II devices contains 16 global clock networks. The device uses
multiplexers with these clocks to form six-bit buses to drive column IOE
clocks, LAB row clocks, or row IOE clocks (see Figure 2–14). Another
multiplexer at the LAB level selects two of the six LAB row clocks to feed
the LE registers within the LAB.
Figure 2–14. Global Clock Network Multiplexers
LAB row clocks can feed LEs, M4K memory blocks, and embedded
multipliers. The LAB row clocks also extend to the row I/O clock regions.
IOE clocks are associated with row or column block regions. Only six
global clock resources feed to these row and column regions. Figure 2–15
shows the I/O clock regions.
Clock [15 or 7..0]
Row I/O Region
IO_CLK [5..0]
Column I/O Region
IO_CLK [5..0]
LAB Row Clock
LABCLK[5..0]
Global Clock
Network



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