| 전자부품 데이터시트 검색엔진 |
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AFE032 데이터시트(PDF) 30 Page - Texas Instruments |
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AFE032 데이터시트(HTML) 30 Page - Texas Instruments |
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30 / 77 page ![]() 0 0.2 0.4 0.6 0.8 1 1.2 100 200 300 400 500 600 Frequency (kHz) Block 2 Block 1 C010 FCC Filter FS = 1200 kHz 0 0.2 0.4 0.6 0.8 1 1.2 100 200 300 400 500 600 Frequency (kHz) Block 2 Block 1 C011 ARIB Filter FS = 1200 kHz 0 0.2 0.4 0.6 0.8 1 1.2 30 60 90 120 150 180 210 Frequency (kHz) C012 CELENEC A Filter FS = 400 kHz Block 2 AFE032 SBOS669A – AUGUST 2013 – REVISED DECEMBER 2013 www.ti.com Figure 23 shows the transfer function of block 2 when the recommended coefficients for the CENELEC A band are used. Figure 23. Transfer Function of Block 2 - CENELEC A Band Coefficients According to Table 8 Figure 24 shows the transfer function of blocks 1 and 2 when the recommended coefficients for the ARIB band are used. Figure 24. Transfer Function of Blocks 1 and 2 - ARIB Band Coefficients According to Table 7 and Table 8 Figure 25 shows the transfer function of blocks 1 and 2 when the recommended coefficients for the FCC band are used. Figure 25. Transfer Function of Blocks 1 and 2 - FCC Band Coefficients According to Table 7 and Table 8 SPI Clock To DAC Clock Synchronization The device receives DAC samples from the external DSP over the SPI (which operates using SCLK) and writes these samples to the ASYNCH FIFO for internal synchronization (the ASYNCH FIFO and the rest of the DSP path operate using the internally-generated DAC_CLK signal). The FIFO read controller pulls the samples out of the ASYNCH FIFO at the rate determined by the DAC_CLK frequency (not the rate determined by fS). 30 Submit Documentation Feedback Copyright © 2013, Texas Instruments Incorporated Product Folder Links: AFE032 |
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