| 전자부품 데이터시트 검색엔진 |
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L4995J 데이터시트(PDF) 18 Page - STMicroelectronics |
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L4995J 데이터시트(HTML) 18 Page - STMicroelectronics |
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18 / 35 page ![]() Application information L4995 18/35 Doc ID 13103 Rev 14 3.1 Voltage regulator Voltage regulator uses a p-channel transistor as a regulating element. With this structure, very low dropout voltage at current up to 500mA is obtained. The output voltage is regulated up to transient input supply voltage of 40V. No functional interruption due to over-voltage pulses is generated. A short circuit protection to GND is provided. The voltage regulator is active when En is high. Figure 28. Behavior of output current versus regulated voltage Vo 3.2 Reset The reset circuit supervises the output voltage Vo. The Vo_th reset threshold is defined with the in-ternal reference voltage and a resistor output divider. If the output voltage becomes lower than Vo_th then Res goes low with a reaction time trr. The reset low signal is guaranteed for an output voltage Vo greater than 1V. When the output voltage becomes higher than Vo_th then Res goes high with a delay trd. This delay is obtained by an internal oscillator. The oscillator period is given by: Equation 1 Tosc = [(VRhth-VRlth) x Ctr] / Icr + [(VRhth-VRlth) x Ctr] / Idr where: Icr:is an internally generated charge current Idr:is an internally generated discharge current VRhth, VRlth:are two voltages defined with the output voltage and a resistor output divider Ctr:is an external capacitance. trd is given by: Equation 2 trd = (VRhth x Ctr)/Icr + 3 x Tosc Vo Vo_ref Iout Ishort Ilim |
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