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CS4218 데이터시트(PDF) 43 Page - Cirrus Logic

부품명 CS4218
상세설명  16-Bit Stereo Audio Codec
PDF  44 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS4218 데이터시트(HTML) 43 Page - Cirrus Logic

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Appendix C: Setting CLKIN/SCLK Ratio for Desired Sample Rate
In Slave sub-modes, the CS4218 detects the ratio between the CLKIN and SCLK rates and sets the
internal sample rate accordingly. The following formula can be used to determine the ratio of CLKIN
to SCLK for any desired sample rate for both Serial Modes 3 and 4, Slave sub-modes.
CLKIN
SCLK
=
(256 × Fsmax)
(BPF × Fs)
where:
CLKIN = Master clock input
In SM3 Multiplier Slave sub-mode, CLKIN is replaced by 16* CLKIN.
SCLK
= Serial port bit clock.
Fsmax
= Maximum system sample rate.
Fs
= Desired sample rate.
BPF
= The number of bits per frame (256, 128, 64 or 32)
Example 1: SM3-S, Fsmax = 48 kHz, Fs = 8 kHz, BPF = 64
CLKIN
SCLK
=
(256 × 48000)
(64 × 8000)
=
12.288 MHz
512 kHz
= 24
Example 2: SM4-S, Fsmax = 8 kHz, Fs = 8 kHz, BPF = 32
CLKIN
SCLK
=
(256 × 8000)
(32 × 8000)
=
2.048 MHz
256 kHz
= 8
CS4218
DS135F1
43



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