AT25DF641_13 datasheet(39/56 Pages) ETC2

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AT25DF641

3680F–DFLASH–4/10

10.3. Write Status Register Byte 2

The Write Status Register Byte 2 c ommand is used to modify the RSTE and SLE bits of the Status Register.

Using the Write Status Register Byte 2 command is the only way to modify the RSTE and SLE bits in the Status

not been frozen. Before the Write Status Register Byte 2 command can be issued, the Write Enable command

must have been previously issued to set the WEL bit in the Status Register to a logical “1”.

To issue the Write Status Register Byte 2 command, the

pin must first be asserted and the opcode of 31h

must be clocked into the device followed by one byte of data. The one byte of data consists of three don’t care

bits, the RSTE bit value, the SLE bit value, and three additional don’t care bits (see Table 10-4). Any additional

data bytes that are sent to the device will be ignored. When the

pin is deasserted, the RSTE and SLE bits in

the Status Register will be modified, and the WEL bit in the Status Register will be reset back to a logical “0”. The

SLE bit will only be modified if the Freeze Sector Lockdown State command has not been previously issued.

The complete one byte of data must be clocked into the device before the

pin is deasserted, and the

must be deasserted on even byte boundaries (multiples of eight bits); otherwise, the device will abort the

operation, the state of the RSTE and SLE bits will not change, and the WEL bit in the Status Register will be reset

back to the logical “0” state.

Table 10-4.

Write Status Register Byte 2 Format

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

RSTE

SLE

Figure 10-3.

Write Status Register Byte 2

SCK

MS B

OPCODE

10 11

14 15

MS B

S TATUS R E GIS TE R IN

BYTE 2

HIG H-IMP E DANC E

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