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CS5180 데이터시트(PDF) 12 Page - Cirrus Logic |
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CS5180 데이터시트(HTML) 12 Page - Cirrus Logic |
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12 / 28 page ![]() CS5180 12 The data from the modulator is output from SDO/SDO in RTZ (Return to Zero) format. The circuit in Figure 6 can be used to reconstruct the data so it can be captured with the rising or falling edge of MCLK. Table 2 illustrates the magnitude of the input signal into the chip versus the ones density out of the modulator. The table does not take into account the potential offset and gain errors of the modulator and their effect on the ones density. Figure 7 and Figure 8 illustrate magnitude versus frequency plots of the modulator bitstream when running at 25.6 MHz. Fully Differential Bipolar Input Voltage2 Modulator Ones Density3 VFS 75% 0 50% -VFS 25% Notes: 2. VFS =VREFIN x 1.6 3. Ones density is approximate; it does not take offset and gain errors into consideration. Table 2. Modulator-Only Mode Ones Density. MCLK Modulator Data SDO Reconstructed Data SDO Figure 5. Modulator Only Mode Data RTZ Format. SDO Reconstructed Data SDO Reconstructed Data Figure 6. Circuit to Reconstruct Return-to-Zero (RTZ) Data from SDO/SDO into Original Modulator Bitstream. Figure 7. Magnitude versus frequency spectrum of modulator bitstream (MCLK = 25.6 MHz). Figure 8. Expanded view of the magnitude versus fre- quency spectrum of modulator bitstream |
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