IO13RSB0 datasheet(70/210 Pages) MICROSEMI

70 / 210 page

ProASIC3 Flash Family FPGAs

Re vi s i on 15

2 - 65

Timing Characteristics

Table 2-90 • LVDS Minimum and Maximum DC Input and Output Levels

DC Parameter

Description

Min.

Typ.

Max.

Units

VCCI

Supply Voltage

2.375

2.5

2.625

VOL

Output Low Voltage

0.9

1.075

1.25

VOH

Output High Voltage

1.25

1.425

1.6

IOL 1

Output Lower Current

0.65

0.91

1.16

IOH 1

Output High Current

0.65

0.91

1.16

Input Voltage

2.925

IIH 2,3

Input High Leakage Current

µA

IIL 2,4

Input Low Leakage Current

µA

VODIFF

Differential Output Voltage

250

350

450

VOCM

Output Common Mode Voltage

1.125

1.25

1.375

VICM

Input Common Mode Voltage

0.05

1.25

2.35

VIDIFF

Input Differential Voltage

100

350

Notes:

1. IOL/ IOH defined by VODIFF/(Resistor Network)

2. Currents are measured at 85°C junction temperature.

3. IIH is the input leakage current per I/O pin over recommended operating conditions VIH < VIN <VCCI. Input current is

larger when operating outside recommended ranges.

4. IIL is the input leakage current per I/O pin over recommended operation conditions where -0.3 V < VIN <VIL.

Table 2-91 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring Point* (V)

1.075

1.325

Cross point

Note:

*Measuring point = Vtrip. See Table 2-22 on page 2-21 for a complete table of trip points.

Table 2-92 • LVDS

Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V

Speed Grade

tDOUT

tDP

tDIN

tPY

Units

Std.

0.66

1.83

0.04

1.60

–1

0.56

1.56

0.04

1.36

–2

0.49

1.37

0.03

1.20

Note:

For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating values.

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