IO13PDB0V0 datasheet(41/197 Pages) MICROSEMI

41 / 197 page

SmartFusion Customizable System-on-Chip (cSoC)

Re vi s i on 12

2 - 29

The length of time an I/O can withstand IOSH/IOSL events depends on the junction temperature. The

reliability data below is based on a 3.3 V, 12 mA I/O setting, which is the worst case for this type of

analysis.

For example, at 100°C, the short current condition would have to be sustained for more than 2200

operation hours to cause a reliability concern. The I/O design does not contain any short circuit

protection, but such protection would only be needed in extremely prolonged stress conditions.

Table 2-32 • Duration of Short Circuit Event before Failure

Temperature

Time before Failure

–40°C

> 20 years

0°C

> 20 years

25°C

> 20 years

70°C

5 years

85°C

2 years

100°C

6 months

Table 2-33 • Schmitt Trigger Input Hysteresis

Hysteresis Voltage Value (typical) for Schmitt Mode Input Buffers

Input Buffer Configuration

Hysteresis Value (typical)

3.3 V LVTTL / LVCMOS / PCI / PCI-X (Schmitt trigger mode)

240 mV

2.5 V LVCMOS (Schmitt trigger mode)

140 mV

1.8 V LVCMOS (Schmitt trigger mode)

80 mV

1.5 V LVCMOS (Schmitt trigger mode)

60 mV

Table 2-34 • I/O Input Rise Time, Fall Time, and Related I/O Reliability

Input Buffer

Input Rise/Fall Time (min.)

Input Rise/Fall Time (max.)

Reliability

LVTTL/LVCMOS

No requirement

10 ns *

20 years (100°C)

LVDS/B-LVDS/

M-LVDS/LVPECL

No requirement

10 ns *

10 years (100°C)

Note:

*The maximum input rise/fall time is related to the noise induced into the input buffer trace. If the

noise is low, then the rise time and fall time of input buffers can be increased beyond the

maximum value. The longer the rise/fall times, the more susceptible the input signal is to the board

noise. Microsemi SoC Products Group recommends signal integrity evaluation/characterization of

the system to ensure that there is no excessive noise coupling into input signals.

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