AS3911B datasheet(39/155 Pages) AMSCO

39 / 155 page

ams Datasheet: 2014-Jun-12 [v1-08]

AS3911B – 39

Appl icatio n I n f o rm a t i o n

Communication to External Microcontroller

The AS3911B is a slave device and the external microcontroller

initiates all communication. Communication is performed by a

4-wire Serial Peripheral Interface (SPI). The AS3911B asks

microcontroller for its attention by sending an interrupt (pin

IRQ). In addition, the microcontroller can use clock signal

available on pin MCU_CLK when the oscillator is running.

Serial Peripheral Interface (SPI)

While signal /SS is high the SPI interface is in reset, while it is

low the SPI interface is enabled. It is recommended to keep

signal /SS high whenever the SPI interface is not in use. MOSI is

sampled at the falling edge of SCLK. All communication is done

in blocks of 8 bits (bytes). First two bits of first byte transmitted

after high to low transition of /SS define SPI operation mode.

MSB bit is always transmitted first (valid for address and data).

Read and Write modes support address auto-incrementing,

which means that in case after the address and first data byte

some additional data bytes are sent (read), they are written to

(read from) addresses incremented by ‘1’. Figure 23 defines

possible modes.

MISO output is usually in tristate, it is only driven when output

data is available. Due to this the MOSI and the MISO can be

externally shorted to create a bidirectional signal.

During the time the MISO output is in tristate, it is possible to

switch on a 10 k

Ω pull down by activating option bits miso_pd1

and miso_pd2 in the IO Configuration Register 2.

Figure 21:

Serial Data Interface (4-wire interface) Signal Lines

Name

Signal

Signal Level

Description

/SS

Digital input

CMOS

SPI Enable (active low)

MOSI

Digital input

CMOS

Serial data input

MISO

Digital output with

tristate

CMOS

Serial data output

SCLK

Digital input

CMOS

Clock for serial

communication

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