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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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WM8960 데이터시트(PDF) 64 Page - Wolfson Microelectronics plc |
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WM8960 데이터시트(HTML) 64 Page - Wolfson Microelectronics plc |
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64 / 92 page  WM8960 Production Data w PD, August 2013, Rev 4.2 64 REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R25 (19h) Power Management (1) 8:7 VMIDSEL 00 Vmid Divider Enable and Select 00 = Vmid disabled (for OFF mode) 01 = 2 x 50k divider enabled (for playback / record) 10 = 2 x 250k divider enabled (for low- power standby) 11 = 2 x 5k divider enabled (for fast start- up) 6 VREF 0 VREF (necessary for all other functions) 0 = Power down 1 = Power up 5 AINL 0 Analogue Input PGA and Boost Left 0 = Power down 1 = Power up (Note: LMIC must also be set to enable the PGA) 4 AINR 0 Analogue Input PGA and Boost Right 0 = Power down 1 = Power up (Note: RMIC must also be set to enable the PGA) 3 ADCL 0 ADC Left 0 = Power down 1 = Power up 2 ADCR 0 ADC Right 0 = Power down 1 = Power up 1 MICB 0 MICBIAS 0 = Power down 1 = Power up 0 DIGENB 0 Master Clock Disable 0 = Master clock enabled 1 = Master clock disabled |
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