 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
ICS1889 데이터시트(PDF) 21 Page - Integrated Circuit Systems |
|
|
|||||||||||||||||||||||||||||
ICS1889 데이터시트(HTML) 21 Page - Integrated Circuit Systems |
|
|
21 / 35 page  21 ICS1889 Initialization & LED Pin Descriptions A set of five pins is dual purpose. At power-up and reset they define the MII PHY address of this ICS1889. Subsequent to power-up and reset, they become LED status indicators. The five pins are used to set the PHY address by connecting them to Vss to indicate a logic one and ground to indicate a logic zero. They must be connected to either Vss or ground using an LED (see Figure xxx). At power-up or reset, the ICS1889 will determine weather the pin is tied to ground or Vss and set the appropriate value in the configuration register. It will then determine the polarity of the signal required to drive the LED and enter the status indicating mode. It will stay in this state until a reset occurs. PHY Address 4 - Receive Data LED (P4RD) At power-up and reset this pin is sampled for a logic high or zero. If a logic one is detected, a value of 16 is set in the configuration register. The ICS1889 sets this bit to the appropriate value to turn on the LED when receive data is detected. This signal is sticky and will ensure that a single packet will be seen. If the packet stream is continuous, the LED will appear permanently on. PHY Address 3 - Transmit Data LED (P3TD) At power-up and reset this pin is sampled for a logic high or zero. If a logic one is detected, a value of 8 is set in the configuration register. The ICS1889 sets this bit to the appropriate value to turn on the LED when transmit data is detected. This signal is sticky and will ensure that a single packet will be seen. If the packet stream is continuous, the LED will appear permanently on. PHY Address 2 - Link Integrity LED (P2LI) At power-up and reset this pin is sampled for a logic high or zero. If a logic one is detected, a value of 4 is set in the configuration register. The ICS1889 sets this bit to the appropriate value to turn on the LED when the Link Integrity status is OK. PHY Address 1 - Collision LED (P1CL) At power-up and reset this pin is sampled for a logic high or zero. If a logic one is detected, a value of 2 is set in the configuration register. The ICS1889 sets this bit to the appropriate value to turn on the LED when a collision is detected. This signal is sticky and will ensure that a single collision will be seen. If the collisions are continuous, the LED will appear permanently on. PHY Address 0 - Full Duplex LED (P0FD) At power-up and reset this pin is sampled for a logic high or zero. If a logic one is detected, a value of 1 is set in the configuration register. The ICS1889 sets this bit to the appropriate value to turn on the LED when the Full Duplex mode is selected. Priority (PRIO) When connected to ground, this pin enables the Duplex Enable Pin (DPEN) to select the duplex mode. When this pin is high, DPEN becomes an output indicating the duplex mode selected. Duplex Enable (DPEN) If the Priority pin (PRIO) is high, Duplex Enable (DPEN) is an output indicating the selected duplex mode. A logic one indicates full duplex and a logic zero indicates half duplex. If the Priority Pin is grounded, this pin becomes an input that sets the duplex mode, a logic one setting the full duplex mode and a logic zero setting the half duplex mode. Link Status (LSTA) This signal indicates the status of the link monitor. A logic one indicates that the link integrity is OK. System Reset (SYSR) When grounded for more than 80ns, this pin causes the ICS1889 to enter a reset cycle. Upon completion of a reset, the ICS1889 will be initialized to the same state as that following a power-up cycle. If SYSR is held low, the ICS1889 remains in the reset state. Node/Repeater (NOD/REP) When this input is logic zero, the device will default to Node operation. SQE test will default to on. When this input is logic one, the device will default to Repeater operation. SQE test will default to off and Carrier Sense will be determined by receive activity only. The NOD/REP pin does not have a default configuration and must be tied either to ground or supply. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
