| 전자부품 데이터시트 검색엔진 |
|
ICS1889 데이터시트(PDF) 11 Page - Integrated Circuit Systems |
|
|
|||||||||||||||||||||||||||||
ICS1889 데이터시트(HTML) 11 Page - Integrated Circuit Systems |
|
11 / 35 page ![]() 11 ICS1889 Link Status (bit 2) When set to a logic one, this bit indicates that the Link Monitor has established a valid link. If the Link Monitor detects a link failure, this bit is set to a logic zero and remains zero through the next read of the status register. A link failure may be due to an error in the receive channel or an error in the receive channel of the link partner (that is, a remote fault). Jabber detect (bit 1) This bit is permanently set to a logic zero. Extended Capability (bit 0) This bit is permanently set to a logic one indicating that the ICS1889 has an extended register set. |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |