AN2168

2 Clock management

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Figure 2.

Prescaler operation

For more details, please refer to the ST10F27x datasheet.

2.1.3

PLL operation

For the remaining combinations of pins P0H.7, P0H.6 and P0H.5, the PLL operation is enabled

and provides the ST10F27x with a main clock. The PLL multiplies the input frequency entered

on pin XTAL1 by a factor selected by the pins P0H.7, P0H.6 and P0H.5 levels.

For more details regarding the maximum crystal frequency and the resulted CPU frequency,

refer to ST10F27x datasheet.

Example:

If a 5 Mhz external crystal is used and P0H[7..5] = 101 configuration is selected, ST10F27x will

run with a 40 Mhz frequency. This example is illustrated in the following figure.

Figure 3.

PLL operation example

2.2

32 kHz low power oscillator

When power down mode is entered, the main oscillator generating the ST10F27x main clock is

switched OFF. If the RTC module needs to continue running during power down mode, a

reference clock is needed. Therefore, a 32 kHz crystal is connected to the low power oscillator

pins XTAL3 and XTAL4, in order to give a reference clock to the RTC module if the main

oscillator is stopped.

XTAL1

XTAL2

P0H.6 = 0

VSS

P0H.5 = 1

VDD

P0H.7 = 0

VSS

XTAL1

XTAL2

P0H.6 = 0

VSS

P0H.5 = 1

VDD

P0H.7 = 1

VDD