AN4092 datasheet(24/38 Pages) STMICROELECTRONICS

24 / 38 page

Configuration pins and unused IOs

AN4092

24/38

Doc ID 023080 Rev 2

specified by the PLLREF pin. The value on the PLLREF pin must be kept constant during

reset to avoid transients in the system clock.

3.4

Weak pull configuration

The signal on the WKPCFG pin determines whether specified eTPU and eMIOS pins are

connected to weak pull up or weak pull down devices at reset (see the Signal Description

chapter in the Reference Manual for the eTPU and eMIOS pins that are affected by

WKPCFG). For all reset sources except the Software External Reset, the WKPCFG pin is

applied at the assertion of the internal reset signal (assertion of RSTOUT). If the WKPCFG

signal is logic high at this time, pull up devices is enabled on the eTPU and eMIOS pins. If

the WKPCFG signal is logic low at the assertion of the internal reset signal, pull down

devices are enabled on those pins. The value on WKPCFG must be held constant during

reset to avoid oscillations on the eTPU and eMIOS pins caused by switching pull up/down

states. The final value of WKPCFG is latched four clock cycles before the negation of

RSTOUT. After reset, software may modify the weak pull up/down selection for all I/O pins

through the PCR registers in the SIU.

3.5

RSTCFG (SPC564Axx only)

RSTCFG is used to enable or disable the PLLREF and the BOOTCFG[0:1] configuration

signals:

●

0: Get configuration information from BOOTCFG[0:1] and PLLREF

●

1: Use default configuration of booting from internal flash with crystal clock source

Note:

For the 176-pin QFP package RSTCFG is always 0, so PLLREF and BOOTCFG signals are

used.

RSTCFG pin allows, for example, to select the most common configuration without the need

of having pulling up/down on several pins.

3.6

Unused I/Os

With respect to power consumption, there is no particular recommendation for unused I/Os:

both input and output buffers are disabled after reset. However, from the EMC perspective,

it is always desirable to tie unused pins to ground or supply voltage, also through internal

pull-up/down resistors (enabled by default).

AN4092 데이터시트(PDF) 24 Page - STMicroelectronics