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UPD17708 데이터시트(PDF) 86 Page - NEC |
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UPD17708 데이터시트(HTML) 86 Page - NEC |
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86 / 356 page ![]() µPD17704, 17705, 17707, 17708, 17709 86 9.2 Data Buffer 9.2.1 Configuration of data buffer Figure 9-2 shows the configuration of the data buffer. As shown in the figure, the data buffer consists of a total of 16 bits of addresses 0CH through 0FH of BANK 0 on the data memory. The 16-bit data is configured with bit 3 of address 0CH as the MSB and bit 0 of address 0FH as the LSB. Because the data buffer is located on the data memory, it can be manipulated by all data memory manipulation instructions. Figure 9-2. Configuration of Data Buffer Column address 0 1 2 3 4 5 6 7 01 234 5 6 7 8 9 A B C D E F BANK0 BANK1 BANK2 BANK14 BANK15 System register Address Bit Bit Signal Data b3 b15 b2 b14 b1 b13 b0 b12 DBF3 0CH b3 b11 b2 b10 b1 b9 b0 b8 DBF2 0DH b3 b7 b2 b6 b1 b5 b0 b4 DBF1 0EH b3 b3 b2 b2 b1 b1 b0 b0 DBF0 0FH Data memory Data buffer Remark Data buffer (DBF) Data memory M S B L S B µ Data The PD17704 and 17705 do not have BANKs 6 through 14. The PD17707 and 17705 do not have BANKs 6 through 14. µ |
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