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UPD17708 데이터시트(PDF) 164 Page - NEC |
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UPD17708 데이터시트(HTML) 164 Page - NEC |
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164 / 356 page ![]() µPD17704, 17705, 17707, 17708, 17709 164 13.3.2 Clock selection, start/stop control, and gate control blocks Figure 13-12 shows the configuration of these blocks. The clock selection block selects a basic clock to operate timer 0 counter. Four types of basic clocks can be selected by using the TM0CK1 and TM0CK0 flags. Figure 13-13 shows the configuration and function of each flag. The start/stop block controls the TM0MD flag and open/close signal from the gate control block, and starts or stops the basic clock to be input to timer 0 counter by the TM0EN flag. The gate control block sets the opening or closing conditions of the gate. It sets whether the gate is opened or closed by a rising or falling of the input signal, by using the TM0GOEG and TM0GCEG flags. This block also issues an interrupt request when the closing condition of the gate is detected. Figure 13-14 shows the configuration and function of each flag. Figure 13-12. Configuration of Clock Selection, Start/Stop Control, and Gate Control Blocks Selector 100 kHz 10 kHz 2 kHz 1 kHz TM0CK1 TM0CK0 Clock selection Divider 4.5 MHz Start/stop Timer 0 counter TM0EN flag TM0MD flag TM0MD flag P1A0/TM0G TM0GOEG TM0GCEG Gate control Open/ close Edge detection Timer 0 interrupt |
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