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AN3308 데이터시트(PDF) 14 Page - STMicroelectronics |
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AN3308 데이터시트(HTML) 14 Page - STMicroelectronics |
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14 / 52 page ![]() Startup sequence AN3308 14/52 Doc ID 18198 Rev 1 3.2 Understanding acceleration data The measured acceleration data are sent to OUTX_H, OUTX_L, OUTY_H, OUTY_L, OUTZ_H, and OUTZ_L registers. These registers contain, respectively, the most significant part and the least significant part of the acceleration signals acting on the X, Y, and Z axes. The complete acceleration data for the X (Y, Z) channel is given by the concatenation OUTX_H & OUTX_L (OUTY_H & OUTY_L, OUTZ_H & OUTZ_L) and it is expressed as a 2’s complement number. 3.2.1 Data alignment Acceleration data are represented as 16-bit numbers and are left justified. 3.2.2 Big-little endian selection The LIS3DH allows to swap the content of the lower and the upper part of the acceleration registers (i.e. OUTX_H with OUTX_L), to be compliant with both little-endian and big-endian data representations. “Little Endian” means that the low-order byte of the number is stored in memory at the lowest address, and the high-order byte at the highest address. (The little end comes first). This mode corresponds to bit BLE in CTRL_REG4 reset to 0 (default configuration). On the contrary, “Big Endian” means that the high-order byte of the number is stored in memory at the lowest address, and the low-order byte at the highest address. 3.2.3 Example of acceleration data Table 6 provides a few basic examples of the data that is read in the data-registers when the device is subject to a given acceleration. The values listed in the table are given under the hypothesis of perfect device calibration (i.e. no offset, no gain error,....) and practically show the effect of the BLE bit. Table 6. Output data registers content vs. acceleration (FS = 2 g) Acceleration values BLE = 0 BLE = 1 Register address 28h 29h 28h 29h 0 g 00h 00h 00h 00h 350 mg E0h 15h 15h E0h 1 g 00h 04h 04h 00h -350 mg 20h EAh EAh 20h -1g 00h C0h C0h 00h |
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