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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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UPD61P24CS 데이터시트(PDF) 16 Page - NEC |
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UPD61P24CS 데이터시트(HTML) 16 Page - NEC |
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16 / 36 page  µPD61P24 16 16. MASK OPTIONS (PLA DATA) The following items are fixed by mask option: •KI, S-IN pin pull-down resistor provided • Carrier duty selection (1/3) at fOSC/12 • Hang-up detection provided <1> KI/O ALL The system is reset when the hang-up detection KI/O ALL switch is set to ON (“1”) by PLA data and if the KI/O pins are in the input mode in the oscillation stop HALT mode or if even one of the KI/O pins is low. To use a pin as a key source of the switch, turn ON the switch with PLA data. Figure 16-1. Hang-up Detection KI/O ALL Configuration Diagram VDD To RESET circuit PLA hang-up detection KI/O ALL switch K output signal I/O0 K output signal I/O1 K output signal I/O2 K output signal I/O3 K output signal I/O4 K output signal I/O5 K input/output selection I/O K output signal I/O6 K output signal I/O7 <2> HALT release condition specification (S-IN, KI/O, KI) The system is reset if S-IN and KI/O are used in the HALT mode when S-IN and KI/O are specified by PLA data not to be used (“1”). KI is used (“0”). |
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