AN2555 - Application note

New registers

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4

New registers

4.1

XADRS3 register

On previous ST10 devices, this register was already present but its value was mask programmed. On the

ST10F276Z5 this register has been made available to the user. It makes it possible for the user to

configure the window size and start address for the accesses to the XFlash and XRAM2 (the 2 modules

are on the same XBus chip select).

SFR

Reset Value: 800Bh

The register functionality is the same as that of ADDRSELx registers used for external address range

selection, with some limitations:

●

the address window can only be located in the first Mbyte of addressable space, that is, in the

00’0000h-0F’FFFFh range

●

the window start address must be aligned to a Range Size boundary

4.1.1

Hardware impacts

None.

15

14

13

12

11

10

987

65432

10

RGSAD

RGSZ

RW

RW

Table 10.

XADRS3 register bits

Bit number

Bit name

Function

3..0

RGSZ

Range Size Selection

Defines the size of the address window.

15..4

RGSAD

Range Start Address

Defines the bits A19..A8 of the start address of the address window.

Table 11.

Definition of address area

Bit field

RGSZ

Selected window

size

Relevant bit (R) of

RGSAD

Selected range Start Address

Relevant bit (R) of Address (A23 - A0)

0 0 0 0

256 bytes

RRRR RRRR RRRR

0000 RRRR RRRR RRRR xxxx xxxx

0 0 0 1

512 bytes

RRRR RRRR RRRx

0000 RRRR RRRR RRRx xxxx xxxx

...

...

...

...

1 0 1 0

256 Kbytes

RRxx xxxx xxxx

0000 RRxx xxxx xxxx xxxx xxxx

1 0 1 1

512 Kbytes

Rxxx xxxx xxxx

0000 Rxxx xxxx xxxx xxxx xxxx

1 1 x x

Reserved