AN2641 datasheet(11/37 Pages) STMICROELECTRONICS

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AN2641

CLCD panel programmable parameters

Doc ID 14027 Rev 1

11/37

used as an enable that indicates to the LCD panel when valid display data is available.

In active display mode, data is driven onto the LCD data lines at the programmed edge

of CLCP when CLAC is in its active state.

0 = CLAC output pin is active HIGH in TFT mode

1 = CLAC output pin is active LOW in TFT mode

Invert panel clock (IPC) bit [13] in the LCD-Timing2 register, used to select the

edge of the panel clock on which pixel data is driven out onto the LCD data lines.

0 = Data is driven on the LCD data lines on the rising edge of CLCP

1 = Data is driven on the LCD data lines on the falling edge of CLCP

Invert Horizontal Synchronization (IHS) bit [12] in the LCD-Timing2 register, used

to invert the polarity of the CLLP signal.

0 = CLLP pin is active HIGH and inactive LOW

1 = CLLP pin is active LOW and inactive HIGH

Invert Vertical Synchronization (IVS) bit [11] in the LCD-Timing2 register, is used

to invert the polarity of the CLFP signal.

0 = CLFP pin is active HIGH and inactive LOW

1 = CLFP pin is active LOW and inactive HIGH.

AC bias pin frequency (ACB) bits [10:6] in the LCD-Timing2 register, applies only

to STN displays, which require the pixel voltage polarity to be periodically reversed to

prevent damage due to DC charge accumulation. Program this field with the required

value minus 1 to apply the number of line clocks between each toggle of the AC bias

pin, CLAC. This field has no effect if the CLCD controller is operating in TFT mode

when the CLAC pin is used as a data enable signal.

2.3

Panel display type

The CLCD controller supports the following types of LCD panels:

●

TFT (Thin Film Transistor) display: Active matrix display panels which require a

digital color value of each pixel to be applied to the display data inputs.

●

STN (Super Twisted Nematic) display: Passive matrix display panels that require

algorithmic pixel pattern generation to provide pseudo gray scaling on mono or color

creation for display (for which a dedicated hardware element, grey scalar, is provided).

Table 1.

Different display types and their properties

LCD type

Single/dual panel

Palettized/non-

palettized

Mono/color

BPP

TFT

Single

Non-Palettized

Color

TFT

Single

Non-Palettized

Color

TFT

Single

Palettized

Color

1, 2, 4 and 8

STN

Single and Dual

Non-Palettized

Color

STN

Single and Dual

Palettized

Color

1, 2, 4 and 8

STN

Single and Dual

Palettized

Mono

1,2 and 4

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