PM0020 datasheet(27/87 Pages) STMICROELECTRONICS

27 / 87 page

PM00020

STR91xFA Flash memory

27/87

1.13

CUI registers

1.13.1

Bank status register

This register can be read using the RSR command (see Section 1.11.1). It can be cleared

using the CLSR command (see Section 1.12.3)

765

43210

PECS

ESS

PSS

BPS

Bit 7

PECS: FPEC Status.

This bit indicates the status of the Program/Erase Controller (FPEC). You can

poll it to check the progress of FPEC operations. It is set on completion of a

Program or Erase operation. The PS and ES bits indicate success or failure.

0: Busy

1: Ready

Bit 6

ESS: Erase Suspend Status.

This bit is set when you write an Erase Suspend command. It remains set until

an Erase Resume command is received.

0: Erase in progress or completed

1: Erase suspended

Bit 5

ES: Erase Status.

This bit is set to “1” if the FPEC has applied the max. number of erase pulses to

the sector without a successful verify.

0: Erase successful

1: Erase failure

Bit 4

PS: Program status.

This bit is set to “1” if the FPEC has failed to program a word.

0: Program successful

1: Program failure

Bit 3

Reserved.

Bit 2

PSS: Program suspend status.

This bit is set when you write an Program Suspend command. It remains set

until an Program Resume command is received.

0: Programming in progress or completed

1: Programming suspended

Bit 1

SP: Sector protection status.

This bit is set to “1” if a Program or Erase operation has been attempted on a

protected sector

0: No Protection error

1: Program/Erase attempted on protected sector

Bit 0

Reserved.

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