RM0319 datasheet(255/368 Pages) STMICROELECTRONICS

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RM0319

Legacy IEEE 1284 parallel port (SPP)

Doc ID 022640 Rev 3

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Legacy IEEE 1284 parallel port (SPP)

This chapter focuses on SPP functionality and operation.

For technical details about the programmable registers related to the SPP, refer to the SPP

registers in the following companion document:

●

RM0321: SPEAr320S address map and registers

20.1

Overview

The standard parallel port (SPP) interface is an AMBA-APB slave interface to the SPP bus.

It is used to receive data over this bus from an external host and transfer it to a processor.

20.2

Main features

●

Slave mode device interface for Standard parallel port Host

●

IEEE 1284 Compatible device

●

Supports unidirectional 8 bit data transfer from host to slave

●

Supports 9th bit for parity/ data/ command etc.

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Maskable Interrupts for data, device reset, Auto Linefeed

●

APB input clock frequency required is 83 MHz for acknowledgement timings

●

Conforms to AMBA-APB specifications

20.3

Functional description

The SPP interface enables data transfer from an external host over a parallel 8 bit bus to the

SoC. One of the potential applications is preprocessing of printer data by a processor in the

SoC before the data is sent to the print head.

Figure 89 shows a block diagram of the SPP interface.

Figure 89.

SPP interface block diagram

Each time a data is received from an external host, it is latched, the appropriate

acknowledgement sent to the host and an interrupt generated for the processor to transfer

SPP

INTERFACE

DATA[7:0]

STRBn

INITn

AUTOFDn

SELINn

ACKn

BUSY

PERROR

FAULTn

SELECT

APB Salve

Interaface

Interrupt

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